Cadence Design Systems has announced a significant expansion of its ChipStack platform, integrating automated simulation and verification capabilities. This move aims to streamline the design process for complex semiconductor architectures, a crucial development as industries increasingly rely on autonomous systems.
What Happened
Cadence’s latest update to its ChipStack platform incorporates advanced tools such as Xcelium, Jasper, and NVIDIA OpenShell runtime. These tools are designed to enhance the autonomous design workflows by providing automated simulation and verification processes. By integrating these advanced capabilities, Cadence is addressing the growing demand for efficient and reliable design processes in the semiconductor industry. The use of NVIDIA OpenShell runtime, in particular, signifies a leap towards leveraging powerful computational resources to manage and optimize design workflows.
What This Means for Your Business
For businesses in the AECM sector, the implications of Cadence’s expansion are substantial. The integration of automated simulation and verification tools could lead to a reduction in design time and cost, enhancing the ROI for companies involved in semiconductor development. As designs become more complex, the ability to automate repetitive and error-prone tasks will be crucial. Additionally, the use of NVIDIA’s OpenShell runtime could offer significant computational advantages, potentially lowering overhead costs associated with hardware requirements.
Moreover, for government contractors and companies involved in defense projects, the enhanced capabilities of ChipStack could align with compliance frameworks such as the Cybersecurity Maturity Model Certification (CMMC) and NIST standards by ensuring more robust and secure design processes.
What US Operators Should Watch
US operators should closely monitor the implementation and impact of these new tools within their design and production pipelines. Key timelines to watch include potential updates from Cadence regarding further integration with other industry-standard tools or platforms. Additionally, companies should be aware of how these advancements might align with upcoming federal procurement opportunities or regulatory changes, particularly in defense and critical infrastructure sectors.
Source: https://www.engineering.com/cadence-expands-chipstack-for-autonomous-design-workflows/. Read the original story ->
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